Papers

Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Paolo Prinetto, Davide Bertozzi, Piero Olivo, Cristian Zambelli. /"FLARES: An Aging Aware Algorithm to Autonomously Adapt the Error Correction Capability in NAND Flash Memories",/ACM Transactions on Architecture and Code Optimization (TACO) TACO Homepage archive, Volume 11 Issue3, August 2014, Article No. 26, pp.26:1-26:25. DOI: 10.1145/2631919
Christian Pinto, Andrea Marongiu, Luca Benini, /"A Virtualization Framework for IOMMU-less Many-Core Accelerators"/. MES 2014: 33-40. DOI=http://dx.doi.org/10.1145/2613908.2613910
Mario Lodde, José Flich “Runtime home mapping for effective memory resource usage” in Microprocessors and Microsystems - Embedded Hardware Design Vol. 38 No. 4, pp. 276-291, June 2014. http://dx.doi.org/10.1016/j.micpro.2014.03.008
Alexander Spyridakis, Daniel Raho, “On Application Responsiveness and Storage Latency in Virtualized Environments”, 5th International Conference on Cloud Computing, GRIDs and Virtualization, May 2014. Proceedings. IARIA
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Salvatore Galfano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi, /"SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives"./ DATE 2014: 1-6. DOI: 10.7873/DATE.2014.297
Paolo Burgio, Giuseppe Tagliavini, Francesco Conti, Andrea Marongiu, Luca Benini, /"Tightly-coupled hardware support to dynamic parallelism acceleration in embedded shared memory clusters"./ DATE 2014: 1-6.DOI=http://dx.doi.org/10.7873/DATE2014.169
Paolo Burgio, Robin Danilo, Andrea Marongiu, Philippe Coussy, Luca Benini, /"A tightly-coupled hardware controller to improve scalability and programmability of shared-memory heterogeneous clusters"/. DATE 2014: 1-4. DOI=http://dx.doi.org/10.7873/DATE2014.038
Alberto Ghiribaldi, Hervé Tatenguem Fankem, Federico Angiolini, Mikkel Bystrup Stensgaard, Tobias Bjerregaard, Davide Bertozzi, /"A vertically integrated and interoperable multi-vendor synthesis flow for predictable noc design in nanoscale technologies". ASP-DAC 2014: 337-342. DOI: 10.1109/ASPDAC.2014.6742912
Francesco Conti, Andrea Marongiu and Luca Benini, "Synthesis-friendly techniques for tightly-coupled integration of hardware accelerators into shared-memory multi-core clusters", in Proceedings of the 2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2013), pp. 1-10. http://dx.doi.org/10.1109/CODES-ISSS.2013.6658992
Abbas Rahimi, Andrea Marongiu, Rajesh Gupta and Luca Benini, "A Variability-Aware OpenMP Environment for Efficient Execution of Accuracy-Configurable Computation on Shared-FPU Processor Clusters", in Proceedings of the 2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2013), pp.1-10. http://dx.doi.org/10.1109/CODES-ISSS.2013.6659022
Zuolo L., D.Bertozzi, C.Zambelli, G.Miorandi, P.Olivo, "System Interconnect Extensions for Fully Transparent Demand Paging in Low-Cost MMU-Less Embedded Systems", System on Chip (SoC) 2013 International Symposium. IEEE, pp.1-16. 10.1109/ISSoC.2013.6675257
M.Balboni, F.Trivino, J.Flich, D.Bertozzi, "Optimizing the Overhead for Network-on-Chip Routing Reconfiguration in Parallel Multi-Core Platforms", System on Chip (SoC) 2013 International Symposium. IEEE, pp.1-16. http://dx.doi.org/10.1109/ISSoC.2013.6675258
Alberto Ros, Blas Cuesta, María E. Gómez, Antonio Robles, and José Duato. "Temporal-Aware Mechanism to Detect Private Data in Chip Multiprocessors". 42nd International Conference on Parallel Processing (ICPP-2013). IEEE, pp. 562-571. http://dx.doi.org/10.1109/ICPP.2013.70
M. D. Grammatikakis, A. Papagrigoriou, P. Petrakis and G. Kornaros, “Non-Intrusive NoC DFS for Soft Real-Time Multimedia Applications”, 16th Euromicro DSD, 4-6 Sep 2013. IEEE, pp.60-63. http://dx.doi.org/10.1109/DSD.2013.140
M. D. Grammatikakis, A. Papagrigoriou, P. Petrakis and G.Kornaros, “Monitoring-Aware Virtual Platform Prototype of Heterogeneous NoC-based Multicore SoCs”, 16th Euromicro DSD, 4-6 Sep 2013. IEEE, pp. 497-504. http://dx.doi.org/10.1109/DSD.2013.59
Mario Lodde, José Flich and Manuel E. Acacio, "Dynamic Cache Blocks Mapping to Reduce Last-Level Cache Access Latency." Jornadas de Paralelismo 2013, September 2013
María Soler and José Flich, "Effective On-Chip Traffic Compression in Embedded Systems". Jornadas de Paralelismo, September 2013
Jaume Joven, Andrea Marongiu, Federico Angiolini, Luca Benini, Giovanni De Micheli, /"An integrated, programming model-driven framework for NoC-QoS support in cluster-based embedded many-cores"./ Parallel Computing 39(10): 549-566 (2013). DOI=http://dx.doi.org/10.1016/j.parco.2013.06.002
María Soler and Jose Flich, "Power Saving by NoC Traffic Compression", in On-Chip Memory Hierarchies and Interconnects workshop (OMHI 2013). Euro-Par 2013: Parallel processing workshops, vol.8374, pp. 465-476. DOI: 10.1007/978-3-642-54420-0_46
Mario Lodde and José Flich, "A Lightweight Network of IDs to Quickly Deliver Simple Control Messages", in On-Chip Memory Hierarchies and Interconnects workshop (OMHI 2013). Euro-Par 2013: Parallel processing workshops, vol.8374, pp. 477-487. DOI: 10.1007/978-3-642-54420-0_47
Mario Lodde, José Flich and Manuel E. Acacio, "Towards Eﬃcient Dynamic LLC Home Bank Mapping with NoC-Level Support". Euro-Par 2013: Parallel processing, vol.8097, pp. 178-190. DOI: 10.1007/978-3-642-40047-6_20
Albert Esteve, Maria Engracia Gómez, and Antonio Robles. "Exploiting Parallelization on Address Translation: Shared Page Walk Cache", in On-Chip Memory Hierarchies and Interconnects workshop (OMHI 2013). Euro-Par 2013: Parallel processing workshops, vol.8374, pp. 433-443. DOI: 10.1007/978-3-642-54420-0_43
Andrea Marongiu, Alessandro Capotondi, Giuseppe Tagliavini, and Luca Benini, "Improving the Programmability of STHORM-based Heterogeneous Systems with Offload-enabled OpenMP", MES 2013, Tel Aviv, June 2013
Antonios Motakis, Alexandery Spyridakis, Daniel Raho, “Introduction on performance analysis and profiling methodologies for KVM on ARM virtualization”, Proc. SPIE 8764, VLSI Circuits and Systems VI, 87640N (May 28, 2013); doi:10.1117/12.2018086
Georgios Kornaros and Dionisios Pnevmatikatos, “A survey and taxonomy of on-chip monitoring of multicore systems-on-chip”, ACM Trans. Des. Autom. Electron. Syst. 18, 2, Article 17 (April 2013), 38 pages. DOI=http://dx.doi.org/10.1145/2442087.2442088
Mario Lodde, Jose Flich, “An NoC and Cache Hierarchy Substrate to Address Effective Virtualization and Fault-Tolerance”. NOCS 2013 (April 2013)
Alberto Ghiribaldi, Davide Bertozzi, Steven M. Nowick, /"A transition-signaling bundled data NoC switch architecture for cost-effective GALS multicore systems/". DATE 2013: 332-337. DOI: 10.7873/DATE.2013.079
Marcello Coppola, John Goodacre, Babak Falsafi, George Kornaros, EMBEDDED TUTORIAL: “From multi-core SoC to scale-out processors”, in Design Automation and Test in Europe (DATE), Mar. 2013, http://dx.doi.org/10.7873/DATE.2013.199
Daniele Bortolotti, Christian Pinto, Andrea Marongiu, Martino Ruggiero and Luca Benini. 2013. VirtualSoC: a Full-System Simulation Environment for Massively Parallel Heterogeneous System-on-Chip. In 2013 IEEE 27th International Symposium on Parallel & Distributed Processing Workshops and PhD Forum
Christian Pinto and Luca Benini. 2013. A Highly Efficient, Thread-Safe Software Cache Implementation for Tightly-Coupled Multicore Clusters. In the 24th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP13), pages 281-288, IEEE, 2013
George Kornaros, Miltos D. Grammatikakis, Marcello Coppola, “Towards Full Virtualization of Heterogeneous NoC-based Multicore Embedded Architectures”, In 10th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, 5-7 Dec, 2012, http://dx.doi.org/10.1109/ICCSE.2012.55
Paolo Burgio, Giuseppe Tagliavini, Andrea Marongiu, and Luca Benini. 2013. Enabling fine-grained OpenMP tasking on tightly-coupled shared memory clusters. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE '13). EDA Consortium, San Jose, CA, USA, 1504-1509
Abbas Rahimi, Andrea Marongiu, Paolo Burgio, Rajesh K. Gupta, and Luca Benini. 2013. Variation-tolerant OpenMP tasking on tightly-coupled processor clusters. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE '13). EDA Consortium, San Jose, CA, USA, 541-546
Francisco Triviño, Davide Bertozzi, and José Flich. "A fast algorithm for runtime reconfiguration to maximize the lifetime of nanoscale NoCs". In Proceedings of the 2013 Interconnection Network Architecture: On-Chip, Multi-Chip (IMA-OCMC '13). ACM, New York, NY, USA, 1-4. DOI=10.1145/2482759.2482760 http://doi.acm.org/10.1145/2482759.2482760
Raoul Bikoni “Integration einer OpenMP Bibliothek in PikeOS SMP”, 2012, Bachelor Work
Mario Lodde, José Flich and Manuel E. Acacio, "A NoC-level Support for Broadcast-based Coherence Protocols." Jornadas de Paralelismo 2012. September 2012
D.Bertozzi, L.Benini, "A Retrospective Look at Xpipes: The Exciting Ride from a Design Experience to a Design Platform for Nanoscale Networks-on-Chip", ICCD 2012, September 2012. HIGH IMPACT PAPER AWARD
A. Strano, F. Triviño, J. Flich, D. Bertozzi, J.L. Sanchez, F.J. Alfaro, "OSR-Lite: Fast and deadlock-free NoC reconfiguration framework," Embedded Computer Systems (SAMOS), 2012 International Conference on , vol., no., pp.86,95, 16-19 July 2012 doi: 10.1109/SAMOS.2012.6404161
A. Motakis, D. Raho, “KVM-on-ARM Vision and Challenges for Green Servers” , ITRI workshop, Taipei (June 2012)
Abellan, J.L.; Fernandez, J.; Acacio, M.E.; Bertozzi, D.; Bortolotti, D.; Marongiu, A.; Benini, L., "Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs", DATE 2012
Albert Esteve, María Soler, Maria Engracia Gómez, Antonio Robles and José Flich, “Detecting Sharing Patterns in Industrial Parallel Applications for Embedded Heterogeneous Multicore Systems”. OMHI workshop. EuroPar 2012
George Kornaros, Dionisios Pnevmatikatos, “Real-Time Monitoring of Multicore SoCs through Specialized. Hardware Agents on NoC Network Interfaces”, 26th IEEE International Parallel and Distributed Processing Symposium, Reconfigurable Architectures Workshop, May 21-22, 2012
John Goodacre, “Hardware accelerated Virtualization In ARM Cotex Processors”, XenSummit ASIA, November 2-3, 20
M. Dehyadegari, A. Marongiu, M. R. Kakoee, L. Benini, S. Mohammadi, N. Yazdani, "A Tightly-Coupled Multi-Core Cluster with Shared-Memory HW Accelerators", SAMOS 2012
Mario Lodde, Jose Flich, Manuel E. Acacio, “Dynamic Last-Level Cache Allocation to Reduce Area and Power Overhead in Directory Coherence Protocols”. Euro-Par 2012: 206-218
Marongiu, P. Burgio, L. Benini, "Fast and Lightweight Support for Nested Parallelism on Cluster-Based Embedded Many-Cores", DATE 2012
P. Burgio, A. Marongiu, D. Heller, C. Chavet, P. Coussy and L. Benini, "OpenMP-based Synergistic Parallelization and HW Acceleration for On-Chip Shared-Memory Clusters", DSD 2012

Papers

Christian Pinto, Andrea Marongiu, Luca Benini, /"A Virtualization Framework for IOMMU-less Many-Core Accelerators"/. MES 2014: 33-40. DOI=http://dx.doi.org/10.1145/2613908.2613910

Mario Lodde, José Flich “Runtime home mapping for effective memory resource usage” in Microprocessors and Microsystems - Embedded Hardware Design Vol. 38 No. 4, pp. 276-291, June 2014. http://dx.doi.org/10.1016/j.micpro.2014.03.008

Alexander Spyridakis, Daniel Raho, “On Application Responsiveness and Storage Latency in Virtualized Environments”, 5th International Conference on Cloud Computing, GRIDs and Virtualization, May 2014. Proceedings. IARIA

Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Salvatore Galfano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi, /"SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives"./ DATE 2014: 1-6. DOI: 10.7873/DATE.2014.297

Paolo Burgio, Giuseppe Tagliavini, Francesco Conti, Andrea Marongiu, Luca Benini, /"Tightly-coupled hardware support to dynamic parallelism acceleration in embedded shared memory clusters"./ DATE 2014: 1-6.DOI=http://dx.doi.org/10.7873/DATE2014.169

Paolo Burgio, Robin Danilo, Andrea Marongiu, Philippe Coussy, Luca Benini, /"A tightly-coupled hardware controller to improve scalability and programmability of shared-memory heterogeneous clusters"/. DATE 2014: 1-4. DOI=http://dx.doi.org/10.7873/DATE2014.038

Zuolo L., D.Bertozzi, C.Zambelli, G.Miorandi, P.Olivo, "System Interconnect Extensions for Fully Transparent Demand Paging in Low-Cost MMU-Less Embedded Systems", System on Chip (SoC) 2013 International Symposium. IEEE, pp.1-16. 10.1109/ISSoC.2013.6675257

M.Balboni, F.Trivino, J.Flich, D.Bertozzi, "Optimizing the Overhead for Network-on-Chip Routing Reconfiguration in Parallel Multi-Core Platforms", System on Chip (SoC) 2013 International Symposium. IEEE, pp.1-16. http://dx.doi.org/10.1109/ISSoC.2013.6675258

Alberto Ros, Blas Cuesta, María E. Gómez, Antonio Robles, and José Duato. "Temporal-Aware Mechanism to Detect Private Data in Chip Multiprocessors". 42nd International Conference on Parallel Processing (ICPP-2013). IEEE, pp. 562-571. http://dx.doi.org/10.1109/ICPP.2013.70

M. D. Grammatikakis, A. Papagrigoriou, P. Petrakis and G. Kornaros, “Non-Intrusive NoC DFS for Soft Real-Time Multimedia Applications”, 16th Euromicro DSD, 4-6 Sep 2013. IEEE, pp.60-63. http://dx.doi.org/10.1109/DSD.2013.140

M. D. Grammatikakis, A. Papagrigoriou, P. Petrakis and G.Kornaros, “Monitoring-Aware Virtual Platform Prototype of Heterogeneous NoC-based Multicore SoCs”, 16th Euromicro DSD, 4-6 Sep 2013. IEEE, pp. 497-504. http://dx.doi.org/10.1109/DSD.2013.59

Mario Lodde, José Flich and Manuel E. Acacio, "Dynamic Cache Blocks Mapping to Reduce Last-Level Cache Access Latency." Jornadas de Paralelismo 2013, September 2013

María Soler and José Flich, "Effective On-Chip Traffic Compression in Embedded Systems". Jornadas de Paralelismo, September 2013

Jaume Joven, Andrea Marongiu, Federico Angiolini, Luca Benini, Giovanni De Micheli, /"An integrated, programming model-driven framework for NoC-QoS support in cluster-based embedded many-cores"./ Parallel Computing 39(10): 549-566 (2013). DOI=http://dx.doi.org/10.1016/j.parco.2013.06.002

María Soler and Jose Flich, "Power Saving by NoC Traffic Compression", in On-Chip Memory Hierarchies and Interconnects workshop (OMHI 2013). Euro-Par 2013: Parallel processing workshops, vol.8374, pp. 465-476. DOI: 10.1007/978-3-642-54420-0_46

Mario Lodde and José Flich, "A Lightweight Network of IDs to Quickly Deliver Simple Control Messages", in On-Chip Memory Hierarchies and Interconnects workshop (OMHI 2013). Euro-Par 2013: Parallel processing workshops, vol.8374, pp. 477-487. DOI: 10.1007/978-3-642-54420-0_47

Mario Lodde, José Flich and Manuel E. Acacio, "Towards Eﬃcient Dynamic LLC Home Bank Mapping with NoC-Level Support". Euro-Par 2013: Parallel processing, vol.8097, pp. 178-190. DOI: 10.1007/978-3-642-40047-6_20

Andrea Marongiu, Alessandro Capotondi, Giuseppe Tagliavini, and Luca Benini, "Improving the Programmability of STHORM-based Heterogeneous Systems with Offload-enabled OpenMP", MES 2013, Tel Aviv, June 2013

Antonios Motakis, Alexandery Spyridakis, Daniel Raho, “Introduction on performance analysis and profiling methodologies for KVM on ARM virtualization”, Proc. SPIE 8764, VLSI Circuits and Systems VI, 87640N (May 28, 2013); doi:10.1117/12.2018086

Georgios Kornaros and Dionisios Pnevmatikatos, “A survey and taxonomy of on-chip monitoring of multicore systems-on-chip”, ACM Trans. Des. Autom. Electron. Syst. 18, 2, Article 17 (April 2013), 38 pages. DOI=http://dx.doi.org/10.1145/2442087.2442088

Mario Lodde, Jose Flich, “An NoC and Cache Hierarchy Substrate to Address Effective Virtualization and Fault-Tolerance”. NOCS 2013 (April 2013)

Alberto Ghiribaldi, Davide Bertozzi, Steven M. Nowick, /"A transition-signaling bundled data NoC switch architecture for cost-effective GALS multicore systems/". DATE 2013: 332-337. DOI: 10.7873/DATE.2013.079

Marcello Coppola, John Goodacre, Babak Falsafi, George Kornaros, EMBEDDED TUTORIAL: “From multi-core SoC to scale-out processors”, in Design Automation and Test in Europe (DATE), Mar. 2013, http://dx.doi.org/10.7873/DATE.2013.199

Daniele Bortolotti, Christian Pinto, Andrea Marongiu, Martino Ruggiero and Luca Benini. 2013. VirtualSoC: a Full-System Simulation Environment for Massively Parallel Heterogeneous System-on-Chip. In 2013 IEEE 27th International Symposium on Parallel & Distributed Processing Workshops and PhD Forum

Christian Pinto and Luca Benini. 2013. A Highly Efficient, Thread-Safe Software Cache Implementation for Tightly-Coupled Multicore Clusters. In the 24th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP13), pages 281-288, IEEE, 2013

George Kornaros, Miltos D. Grammatikakis, Marcello Coppola, “Towards Full Virtualization of Heterogeneous NoC-based Multicore Embedded Architectures”, In 10th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, 5-7 Dec, 2012, http://dx.doi.org/10.1109/ICCSE.2012.55

Paolo Burgio, Giuseppe Tagliavini, Andrea Marongiu, and Luca Benini. 2013. Enabling fine-grained OpenMP tasking on tightly-coupled shared memory clusters. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE '13). EDA Consortium, San Jose, CA, USA, 1504-1509

Abbas Rahimi, Andrea Marongiu, Paolo Burgio, Rajesh K. Gupta, and Luca Benini. 2013. Variation-tolerant OpenMP tasking on tightly-coupled processor clusters. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE '13). EDA Consortium, San Jose, CA, USA, 541-546

Raoul Bikoni “Integration einer OpenMP Bibliothek in PikeOS SMP”, 2012, Bachelor Work

Mario Lodde, José Flich and Manuel E. Acacio, "A NoC-level Support for Broadcast-based Coherence Protocols." Jornadas de Paralelismo 2012. September 2012

D.Bertozzi, L.Benini, "A Retrospective Look at Xpipes: The Exciting Ride from a Design Experience to a Design Platform for Nanoscale Networks-on-Chip", ICCD 2012, September 2012. HIGH IMPACT PAPER AWARD

A. Strano, F. Triviño, J. Flich, D. Bertozzi, J.L. Sanchez, F.J. Alfaro, "OSR-Lite: Fast and deadlock-free NoC reconfiguration framework," Embedded Computer Systems (SAMOS), 2012 International Conference on , vol., no., pp.86,95, 16-19 July 2012 doi: 10.1109/SAMOS.2012.6404161

A. Motakis, D. Raho, “KVM-on-ARM Vision and Challenges for Green Servers” , ITRI workshop, Taipei (June 2012)

Abellan, J.L.; Fernandez, J.; Acacio, M.E.; Bertozzi, D.; Bortolotti, D.; Marongiu, A.; Benini, L., "Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs", DATE 2012

Albert Esteve, María Soler, Maria Engracia Gómez, Antonio Robles and José Flich, “Detecting Sharing Patterns in Industrial Parallel Applications for Embedded Heterogeneous Multicore Systems”. OMHI workshop. EuroPar 2012

George Kornaros, Dionisios Pnevmatikatos, “Real-Time Monitoring of Multicore SoCs through Specialized. Hardware Agents on NoC Network Interfaces”, 26th IEEE International Parallel and Distributed Processing Symposium, Reconfigurable Architectures Workshop, May 21-22, 2012

John Goodacre, “Hardware accelerated Virtualization In ARM Cotex Processors”, XenSummit ASIA, November 2-3, 20

M. Dehyadegari, A. Marongiu, M. R. Kakoee, L. Benini, S. Mohammadi, N. Yazdani, "A Tightly-Coupled Multi-Core Cluster with Shared-Memory HW Accelerators", SAMOS 2012

Mario Lodde, Jose Flich, Manuel E. Acacio, “Dynamic Last-Level Cache Allocation to Reduce Area and Power Overhead in Directory Coherence Protocols”. Euro-Par 2012: 206-218

Marongiu, P. Burgio, L. Benini, "Fast and Lightweight Support for Nested Parallelism on Cluster-Based Embedded Many-Cores", DATE 2012

P. Burgio, A. Marongiu, D. Heller, C. Chavet, P. Coussy and L. Benini, "OpenMP-based Synergistic Parallelization and HW Acceleration for On-Chip Shared-Memory Clusters", DSD 2012